Characterizing Warp Divergence from Pascal to Blackwell
Warp divergence still scales predictably across NVIDIA generations, even as the control-flow machinery changes.
The paper tests Pascal through Blackwell and finds divergent paths serialize roughly linearly with the number of paths, without an added super-linear reconvergence cost. Predication removes that serialization cost, and the same programmer-visible model appears before and after Volta’s Independent Thread Scheduling. The architectural differences are in the compiler and ISA mechanisms: Pascal uses SSY/SYNC, later GPUs use barrier-register instructions, and Blackwell adds new convergence-related classifications and synchronization forms. In the author’s tests, Blackwell’s new barrier class appears to be a static compiler classification with no observable runtime effect. HF Daily Papers' note
The paper tests Pascal through Blackwell and finds divergent paths serialize roughly linearly with the number of paths, without an added super-linear reconvergence cost. Predication removes that serialization cost, and the same programmer-visible model appears before and after Volta’s Independent Thread Scheduling. The architectural differences are in the compiler and ISA mechanisms: Pascal uses SSY/SYNC, later GPUs use barrier-register instructions, and Blackwell adds new convergence-related classifications and synchronization forms. In the author’s tests, Blackwell’s new barrier class appears to be a static compiler classification with no observable runtime effect. HF Daily Papers' note
score 5